This invention relates to a read-out circuit for a semiconductor nonvolatile memory, wherein two channels under a selective gate and a floating gate are connected in series, and a control gate for the floating gate electrode also operates as a drain.
A conventional method of reading out information from such a nonvolatile memory comprises detecting slight changes in the conductivity of the nonvolatile memory instead of detecting whether or not the memory is conductive. Accordingly, the circuit configuration of a sense amplifier used therefor is complicated, which is a disadvantage. The conventional reading method will be described in more detail below, with reference to FIGS. 1 to 4.
FIG. 1 is a sectional view showing the basic structure of a conventional nonvolatile memory. An n-type source region 2 and a drain region 3 provided in a p-type semiconductor substrate 1 are connected in series by two channels or channel regions controlled by a selection gate electrode 7 and a floating gate electrode 6 extending over a selection gate insulator 4 and a floating gate insulator 5 respectively. The floating gate electrode 6 extends over the drain region 3 on an insulator 9, and the drain region 3 also functions as a control gate controlling the potential of the floating gate electrode 6 through a capacitance coupling therebetween. FIG. 2 is a symbolic diagram of the nonvolatile memory of FIG. 1, and FIG. 3 is a circuit diagram of a typical conventional read-out circuit. The circuit applies a voltage V.sub.GS to the selection gate of the nonvolatile memory so that a current is passed through the channel under the selection gate so as to drive a p-channel MOS transistor 11 connected at the drain of a nonvolatile memory 12, and detects a drain voltage of the memory 12 as a read-out voltage V.sub.out. A graph of the operating characteristic of the read-out circuit of FIG. 3 is shown in FIG. 4. The drain current of the nonvolatile memory 12 has a characteristic such as curve 21 or 22 of FIG. 4 with respect to the drain voltage or the read-out voltage V.sub.out. The solid-line curve 21 is the drain current characteristic when the floating gate electrode is not charged with electrons, and the channel is turned on under the floating gate even when the drain voltage is zero. The broken-line curve 22 is the drain current characteristic when the channel is turned off below the floating gate electrode, when the floating gate electrode is charged with electrons and the drain voltage is zero. Both curves 21, 22 show a sudden rise within the range in which the drain current is small, as the voltage of the floating gate increases together with the drain voltage V.sub.out through the capacitance coupling. However, both curves reach saturation if the drain current grows while the current is limited by the saturation current of the selection gate. The curve 23 is the load characteristic of the p-channel MOS transistor 11 of FIG. 3. Since the read-out voltage V.sub.out is given by the intersection of the curve 21 or 22 and the load curve 23, the difference in read-out voltage between the state in which the floating gate electrode of the nonvolatile memory is charged with electrons and the state in which it is not charged corresponds to the voltage .DELTA.V.sub.out. The voltage .DELTA.V.sub.out is virtually equal to the fluctuations in the threshold voltage of the channel under the floating gate electrode due to the charging rate of the floating gate. At the drain, the read-out voltage changes very little when fluctuations of the threshold voltage due charging electrons into the floating gate electrode of the nonvolatile memory are small. Thus a sense amplifier which has a satisfactory accuracy, but a complicated structure, is necessary for detecting the fluctuations .DELTA.V.sub.out in the read-out voltage.
As described in detail above, it is difficult to realize a stable read-out with a conventional read-out circuit for a nonvolatile memory when the output voltage fluctuates very little.